
IDT82V3202
EBU WAN PLL
Functional Block Diagram
11
September 11, 2009
FUNCTIONAL BLOCK DIAGRAM
Figure 1. Functional Block Diagram
Monit
or
s
T0
PFD
&L
PF
Di
vide
r
APLL
M
icropr
oc
es
so
r
Int
er
fa
ce
JT
AG
PBO
Ph
as
eO
ffs
et
T4
APLL
T0
APLL
Divider
OU
T1
_DI
FF
OUT1
_DI
FF
MU
X
OU
T2
OU
T2
MUX
T4
APLL
MU
X
T0
APLL
MUX
T0
In
pu
t
Sel
ect
or
OSC
I
77.76
MHz
16E1
/16
T1
12E1
/24
T1/
E3
/T3
Auto
Di
vi
de
r
6
T0
DPL
L
In
pu
t
IN
1_
C
M
OS
EX
_S
YN
C
1
IN
2_
C
M
OS
EX_
SY
N
C
2
FR
SY
N
C
_8
K
Ou
tpu
t
G
SM
/O
BS
AI/16E
1/
16T
1
In
pu
tP
re-
Di
vi
de
r
Pri
or
ity
In
pu
tP
re-
Di
vi
de
r
Pri
or
ity
Divi
de
r
EX
_SYN
C1
EX_SYN
C2
FRSYN
C_8K
MU
X
(OU
T
1
_D
IF
F
=
O
U
T
1
_POS
+
OU
T
1_
N
EG)